Teradar is pioneering a new era in perception with the world’s first automotive terahertz vision sensor, delivering ultra-high resolution imaging in any weather condition. SummaryWe are seeking a seasoned SoC Expert to work on our custom automotive SoC across the full lifecycle—architecture modeling, RTL design & verification, synthesis, physical design, tapeout, and post‑silicon validation. This role emphasizes performance, power management innovation and functional safety compliance, ensuring reliable performance for our next‑generation high‑performance sensor systems. Responsibilities include guiding post‑silicon debug and corrective tapeouts and driving platform evolution, with deep expertise in Arm/RISC CPUs and DSPs. Role OverviewFocus on evaluation, optimization, and continuous improvement across the silicon lifecycle, from early modeling through tapeout and silicon bring‑up. Key Responsibilities- Evaluate and optimize the SoC across the full lifecycle (architecture, RTL design/verification, synthesis, physical implementation, tapeout, post‑silicon validation).- Drive power management strategies (DVFS, leakage reduction, low‑power techniques).- Lead post‑silicon debug and corrective tapeouts.- Contribute to platform evolution for next‑gen SoCs.- Collaborate with design houses, foundries, and IP vendors to execute tapeout and bring‑up.- Perform functional safety analysis (ISO 26262) and ensure compliance (ASIL, AEC‑Q100).- Support DFT/DFM for reliable production.- Conduct microarchitectural analysis and workload characterization.- Document and communicate findings to cross‑functional teams. Qualifications- 7+ years in SoC design/evaluation across the lifecycle.- Strong background in Arm/RISC CPU and DSP architectures.- Experience with ISO 26262, ASIL, AEC‑Q100.- Hands‑on with EDA tools (Synopsys, Cadence, Mentor).- Track record of successful tapeouts, post‑silicon debug.- Contributions to platform evolution.- Excellent communication/collaboration; GPU experience a plus. Must Have Skills include lifecycle expertise, Arm/RISC CPUs & DSPs, EDA tools, tapeout/post‑silicon debug, ISO 26262/ASIL/AEC‑Q100, microarchitectural analysis; Good to Have: GPU architectures, ML accelerators, hardware security, multi‑die packaging, automotive networking, sensor signal processing, leadership.