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Senior Principal Engineer, Physical Design Methodology & RTL-to-GDS Architecture

Location: Bengaluru, Karnataka, India
Posted:
12 days
Senior
Application Specific Integrated Circuit (ASIC)
Computer
Electronics
Embedded Systems
Field-Programmable Gate Array (FPGA)
Hardware
Industrial Manufacturing
Intellectual Property
Manufacturing
RISC
Semiconductor
Software

Senior Staff RTL Design Engineer - CPU Frontend

Location: Santa Clara, CA, USA; Cambridge, UK
Compensation:

USD 205,740-251,460 / year + Equity

Posted:
1 month
Senior
Application Specific Integrated Circuit (ASIC)
Computer
Electronics
Embedded Systems
Field-Programmable Gate Array (FPGA)
Hardware
Industrial Manufacturing
Intellectual Property
Manufacturing
RISC
Semiconductor
Software

Senior RTL Design Engineer - CPU Frontend

Location: Santa Clara, CA, USA; Cambridge, UK
Compensation:

USD 158,760-194,040 / year + Equity

Posted:
5 months
Senior
Application Specific Integrated Circuit (ASIC)
Computer
Electronics
Embedded Systems
Field-Programmable Gate Array (FPGA)
Hardware
Industrial Manufacturing
Intellectual Property
Manufacturing
RISC
Semiconductor
Software

Senior RTL Design Engineer - CPU

Location: Cambridge, UK
Posted:
5 months
Senior
Application Specific Integrated Circuit (ASIC)
Computer
Electronics
Embedded Systems
Field-Programmable Gate Array (FPGA)
Hardware
Industrial Manufacturing
Intellectual Property
Manufacturing
RISC
Semiconductor
Software